Dynamic Rate Neural Acceleration Using Multiprocessing Mode Support

Inho Lee, Yangki Lee, Hongjun Um, Seongmin Hong, Yongjun Park

Research output: Contribution to journalArticlepeer-review


Multiobject detection has become an integral component in various neural applications, such as autonomous driving and augmented reality. The system should be able to recognize and process multiple objects simultaneously. Moreover, the performance requirements for this system can be dynamically changed depending on the number of regions of interest (ROIs) in each frame. Consequently, the processing unit (PU) of the neural acceleration system should provide various inference rates. Therefore, we present a field-programmable gate array (FPGA)-based dynamic rate neural acceleration system called MultiLockOn to dynamically change the inference performance according to the number of ROIs per frame. It supports multiprocessing modes with different speeds through the introduction of novel multi-mode processing engines (PEs) comprising minimum reconfigurable interconnections across inference modes to minimize hardware overhead. The MultiLockOn system can provide an improvement of up to 4times in the inference performance compared to that of DNNWeaver and 5.7times compared to that of the ARM Cortex-A53 with minimum accuracy loss by supporting the multiprocessing modes.

Original languageEnglish
Pages (from-to)1461-1472
Number of pages12
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Issue number10
Publication statusPublished - 2022 Oct 1

Bibliographical note

Publisher Copyright:
© 1993-2012 IEEE.

All Science Journal Classification (ASJC) codes

  • Software
  • Hardware and Architecture
  • Electrical and Electronic Engineering


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