Abstract
A double-layer-stacked 1 diode-1 resistor (1D1R) cross-bar array (CBA) resistance switching random access memory is fabricated. The TiO2-based Schottky diode and the unipolar resistance switching TiO2 comprise the cell selector and nonvolatile memory components, respectively. All the fabrication processes are performed near room temperature through physical vapor deposition processes, and the performance degradation by the thermal budget is well suppressed. As a result, a rectification ratio as high as 1.4 × 109 is achieved from the appropriately cycled diode, which can last up to 108 cycles in the integrated structure. Such highly promising performance is confirmed from both the upper and lower memory layers, which confirm the possible route for the multistacked memory structure. The two-bit-per-cell operation allows an effective minimum cell area of F2, which is confirmed from the randomly accessed cells to be completely free from adverse interference through the adoption of an extremely-high-performance diode. The present 1D1R integration technique will eventually allow the fabrication of an extremely high-integration-density (above 1 Gb per block) CBA with the help of the two-port sensing scheme. Such a high-performance CBA device is a feasible contender for memory-dominant computation.
Original language | English |
---|---|
Article number | 1700152 |
Journal | Advanced Electronic Materials |
Volume | 3 |
Issue number | 7 |
DOIs | |
Publication status | Published - 2017 Jul 1 |
Bibliographical note
Publisher Copyright:© 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials