Design of high speed CAVLC decoder for H.264/AVC

Engineering

• One Step 66%
• High Speed 66%
• Cycles 66%
• Processing Time 33%
• Bitstream 33%
• Codeword Length 33%
• Design 33%
• Elements 33%
• Obtains 33%
• Architecture 33%
• Libraries 33%
• Standard Cell 33%

Computer Science

• Variable Length 100%
• Contexts 100%
• Logic Gate 66%
• Hardware Architecture 33%
• Shifters 33%
• Processing Time 33%
• Codeword Length 33%
• Hardware Description Languages 33%
• Design 33%