Design of a Host Interface Logic for GC-Free SSDs

Myoungsoo Jung; Wonil Choi; Miryeong Kwon; Shekhar Srikantaiah; Joonhyuk Yoo; Mahmut Taylan Kandemir

doi:10.1109/TCAD.2019.2919035

Design of a Host Interface Logic for GC-Free SSDs

Myoungsoo Jung, Wonil Choi, Miryeong Kwon, Shekhar Srikantaiah, Joonhyuk Yoo, Mahmut Taylan Kandemir

School of Integrated Technology

Research output: Contribution to journal › Article › peer-review

7 Citations (Scopus)

Abstract

Garbage collection (GC) and resource contention on I/O buses (channels) are among the critical bottlenecks in solid-state drives (SSDs) that cannot be easily hidden. Most existing I/O scheduling algorithms in the host interface logic (HIL) of state-of-the-art SSDs are oblivious to such low-level performance bottlenecks in SSDs. As a result, SSDs may violate quality of service (QoS) requirements by not being able to meet the deadlines of I/O requests. In this paper, we propose a novel host interface I/O scheduler that is both GC aware and QoS aware. The proposed scheduler redistributes the GC overheads across noncritical I/O requests and reduces channel resource contention. Our experiments with workloads from various application domains revealed that the proposed client-level SSD scheduler reduces the standard deviation for latency by 52.5% and the worst-case latency by 86.6%, compared to the state-of-the-art I/O schedulers used for the HIL. In addition, for I/O requests smaller than a superpage, the proposed scheduler avoids channel resource conflicts and reduces latency by 29.2% in comparison to the state-of-the-art I/O schedulers. Furthermore, we present an extension of the proposed I/O scheduler for enterprise SSDs based on the NVMe protocol.

Original language	English
Article number	8723109
Pages (from-to)	1674-1687
Number of pages	14
Journal	IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Volume	39
Issue number	8
DOIs	https://doi.org/10.1109/TCAD.2019.2919035
Publication status	Published - 2020 Aug

Bibliographical note

Funding Information:
Manuscript received August 30, 2018; revised December 22, 2018 and March 7, 2019; accepted April 13, 2019. Date of publication May 27, 2019; date of current version July 17, 2020. This work was supported in part by the National Research Foundation of Korea under Grant 2016R1C1B2015312, Grant 2015M3C4A7065645, and Grant 2017R1A4A1015498, in part by the U.S. Department of Energy under Grant DEAC02-05CH11231, in part by the Samsung under Grant IO181008-05622-01, and in part by the National Science Foundation under Grant 1822923, Grant 1439021, Grant 1629915, Grant 1626251, Grant 1629129, Grant 1763681, Grant 1526750, and Grant 1439057. This paper is a full-length version of an earlier conference paper [59]. This paper was recommended by Associate Editor Y. Wang. (Myoungsoo Jung and Wonil Choi contributed equally to this work.) (Corresponding author: Myoungsoo Jung.) M. Jung and M. Kwon are with the School of Electrical Engineering, KAIST, Daejeon 34141, South Korea (e-mail: mj@camelab.org; mkwon@camelab.org).

Publisher Copyright:
© 1982-2012 IEEE.

All Science Journal Classification (ASJC) codes

Software
Computer Graphics and Computer-Aided Design
Electrical and Electronic Engineering

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10.1109/TCAD.2019.2919035

Cite this

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title = "Design of a Host Interface Logic for GC-Free SSDs",

abstract = "Garbage collection (GC) and resource contention on I/O buses (channels) are among the critical bottlenecks in solid-state drives (SSDs) that cannot be easily hidden. Most existing I/O scheduling algorithms in the host interface logic (HIL) of state-of-the-art SSDs are oblivious to such low-level performance bottlenecks in SSDs. As a result, SSDs may violate quality of service (QoS) requirements by not being able to meet the deadlines of I/O requests. In this paper, we propose a novel host interface I/O scheduler that is both GC aware and QoS aware. The proposed scheduler redistributes the GC overheads across noncritical I/O requests and reduces channel resource contention. Our experiments with workloads from various application domains revealed that the proposed client-level SSD scheduler reduces the standard deviation for latency by 52.5% and the worst-case latency by 86.6%, compared to the state-of-the-art I/O schedulers used for the HIL. In addition, for I/O requests smaller than a superpage, the proposed scheduler avoids channel resource conflicts and reduces latency by 29.2% in comparison to the state-of-the-art I/O schedulers. Furthermore, we present an extension of the proposed I/O scheduler for enterprise SSDs based on the NVMe protocol.",

author = "Myoungsoo Jung and Wonil Choi and Miryeong Kwon and Shekhar Srikantaiah and Joonhyuk Yoo and Kandemir, {Mahmut Taylan}",

note = "Funding Information: Manuscript received August 30, 2018; revised December 22, 2018 and March 7, 2019; accepted April 13, 2019. Date of publication May 27, 2019; date of current version July 17, 2020. This work was supported in part by the National Research Foundation of Korea under Grant 2016R1C1B2015312, Grant 2015M3C4A7065645, and Grant 2017R1A4A1015498, in part by the U.S. Department of Energy under Grant DEAC02-05CH11231, in part by the Samsung under Grant IO181008-05622-01, and in part by the National Science Foundation under Grant 1822923, Grant 1439021, Grant 1629915, Grant 1626251, Grant 1629129, Grant 1763681, Grant 1526750, and Grant 1439057. This paper is a full-length version of an earlier conference paper [59]. This paper was recommended by Associate Editor Y. Wang. (Myoungsoo Jung and Wonil Choi contributed equally to this work.) (Corresponding author: Myoungsoo Jung.) M. Jung and M. Kwon are with the School of Electrical Engineering, KAIST, Daejeon 34141, South Korea (e-mail: mj@camelab.org; mkwon@camelab.org). Publisher Copyright: {\textcopyright} 1982-2012 IEEE.",

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AU - Kandemir, Mahmut Taylan

N1 - Funding Information: Manuscript received August 30, 2018; revised December 22, 2018 and March 7, 2019; accepted April 13, 2019. Date of publication May 27, 2019; date of current version July 17, 2020. This work was supported in part by the National Research Foundation of Korea under Grant 2016R1C1B2015312, Grant 2015M3C4A7065645, and Grant 2017R1A4A1015498, in part by the U.S. Department of Energy under Grant DEAC02-05CH11231, in part by the Samsung under Grant IO181008-05622-01, and in part by the National Science Foundation under Grant 1822923, Grant 1439021, Grant 1629915, Grant 1626251, Grant 1629129, Grant 1763681, Grant 1526750, and Grant 1439057. This paper is a full-length version of an earlier conference paper [59]. This paper was recommended by Associate Editor Y. Wang. (Myoungsoo Jung and Wonil Choi contributed equally to this work.) (Corresponding author: Myoungsoo Jung.) M. Jung and M. Kwon are with the School of Electrical Engineering, KAIST, Daejeon 34141, South Korea (e-mail: mj@camelab.org; mkwon@camelab.org). Publisher Copyright: © 1982-2012 IEEE.

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Design of a Host Interface Logic for GC-Free SSDs

Abstract

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