Design method for HTS wire length of the small scale resistive type superconducting fault current limiter considering system resistance

W. S. Lee; S. J. Choi; J. Y. Jang; Y. J. Hwang; J. S. Kang; D. G. Yang; H. G. Lee; T. K. Ko

doi:10.9714/psac.2011.13.3.014

Design method for HTS wire length of the small scale resistive type superconducting fault current limiter considering system resistance

W. S. Lee, S. J. Choi, J. Y. Jang, Y. J. Hwang, J. S. Kang, D. G. Yang, H. G. Lee, T. K. Ko

Department of Electrical and Electronic Engineering

Research output: Contribution to journal › Article › peer-review

1 Citation (Scopus)

Abstract

Electrical system is changing to smart grid which includes the distributed generations with reusable energy sources in these days. The distributed generations are environmentally friendly and have no concern with depletion problem. But dispatching distributed generations can cause an increase of the fault current. Resistive type superconducting fault current limiter is one of the candidates of solution for the large fault problem in smart grid. In this paper, a design method for the wire length of fault current limiter and the result of short circuit test for small scale modules considering system resistance are introduced.

Original language	English
Pages (from-to)	14-18
Number of pages	5
Journal	Journal of the Korea Institute of Applied Superconductivity and Cryogenics
Volume	13
Issue number	3
DOIs	https://doi.org/10.9714/psac.2011.13.3.014
Publication status	Published - 2011 Sept

All Science Journal Classification (ASJC) codes

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

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10.9714/psac.2011.13.3.014

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Lee, W. S., Choi, S. J., Jang, J. Y., Hwang, Y. J., Kang, J. S., Yang, D. G., Lee, H. G., & Ko, T. K. (2011). Design method for HTS wire length of the small scale resistive type superconducting fault current limiter considering system resistance. Journal of the Korea Institute of Applied Superconductivity and Cryogenics, 13(3), 14-18. https://doi.org/10.9714/psac.2011.13.3.014

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author = "Lee, {W. S.} and Choi, {S. J.} and Jang, {J. Y.} and Hwang, {Y. J.} and Kang, {J. S.} and Yang, {D. G.} and Lee, {H. G.} and Ko, {T. K.}",

year = "2011",

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doi = "10.9714/psac.2011.13.3.014",

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AU - Choi, S. J.

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AU - Hwang, Y. J.

AU - Kang, J. S.

AU - Yang, D. G.

AU - Lee, H. G.

AU - Ko, T. K.

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AB - Electrical system is changing to smart grid which includes the distributed generations with reusable energy sources in these days. The distributed generations are environmentally friendly and have no concern with depletion problem. But dispatching distributed generations can cause an increase of the fault current. Resistive type superconducting fault current limiter is one of the candidates of solution for the large fault problem in smart grid. In this paper, a design method for the wire length of fault current limiter and the result of short circuit test for small scale modules considering system resistance are introduced.

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Design method for HTS wire length of the small scale resistive type superconducting fault current limiter considering system resistance

Abstract

All Science Journal Classification (ASJC) codes

UN SDGs

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