Design and verification of intra prediction hardware for video streaming in IoT systems

Jaehyuk So, Kyungmook Oh, Jaeseok Kim

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)


In this paper, we presents efficient hardware design of the slim model of HEVC intra prediction. Our intra prediction module do not use several techniques (TSM, RQT, prediction for 32 × 32 block) used in HM. And several techniques (RMD, RDO) are simplified for hardware design. Though the compression performance is decreased due to this simplification, it allows the hardware implementation of real-time encoder. Real-time Encoder is suitable for IoT because our encoder's size is small and fast. Also the verification of the proposed intra prediction design is conducted. The proposed design was verified via FPGA.

Original languageEnglish
Title of host publicationISOCC 2015 - International SoC Design Conference
Subtitle of host publicationSoC for Internet of Everything (IoE)
PublisherInstitute of Electrical and Electronics Engineers Inc.
Number of pages2
ISBN (Electronic)9781467393089
Publication statusPublished - 2016 Feb 8
Event12th International SoC Design Conference, ISOCC 2015 - Gyeongju, Korea, Republic of
Duration: 2015 Nov 22015 Nov 5

Publication series

NameISOCC 2015 - International SoC Design Conference: SoC for Internet of Everything (IoE)


Other12th International SoC Design Conference, ISOCC 2015
Country/TerritoryKorea, Republic of

Bibliographical note

Publisher Copyright:
© 2015 IEEE.

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials


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