TY - JOUR
T1 - Column-parallel single slope ADC with digital correlated multiple sampling for low noise CMOS image sensors
AU - Chen, Yue
AU - Theuwissen, Albert J.P.
AU - Chae, Youngcheol
PY - 2011
Y1 - 2011
N2 - This paper presents a low noise CMOS image sensor (CIS) using 10/12 bit configurable column-parallel single slope ADCs (SS-ADCs) and digital correlated multiple sampling (CMS). The sensor used is a conventional 4T active pixel with a pinned-photodiode as photon detector. The test sensor was fabricated in a 0.18 μm CMOS image sensor process from TSMC. The ADC nonlinearity measurement result shows totally 0.58% nonlinearity. Using the proposed column-parallel SS-ADC with digital CMS technique, 65% random noise reduction is obtained. The significant noise reduction enhances the sensor's SNR with 9 dB.
AB - This paper presents a low noise CMOS image sensor (CIS) using 10/12 bit configurable column-parallel single slope ADCs (SS-ADCs) and digital correlated multiple sampling (CMS). The sensor used is a conventional 4T active pixel with a pinned-photodiode as photon detector. The test sensor was fabricated in a 0.18 μm CMOS image sensor process from TSMC. The ADC nonlinearity measurement result shows totally 0.58% nonlinearity. Using the proposed column-parallel SS-ADC with digital CMS technique, 65% random noise reduction is obtained. The significant noise reduction enhances the sensor's SNR with 9 dB.
UR - http://www.scopus.com/inward/record.url?scp=84863150483&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84863150483&partnerID=8YFLogxK
U2 - 10.1016/j.proeng.2011.12.312
DO - 10.1016/j.proeng.2011.12.312
M3 - Conference article
AN - SCOPUS:84863150483
SN - 1877-7058
VL - 25
SP - 1265
EP - 1268
JO - Procedia Engineering
JF - Procedia Engineering
T2 - 25th Eurosensors Conference
Y2 - 4 September 2011 through 7 September 2011
ER -