Collision-free interleaver composed of a latin square for parallel-architecture turbo codes

Dae Son Kim; Hyun Young Oh; Hong Yeop Song

doi:10.1109/LCOMM.2008.071423

Collision-free interleaver composed of a latin square for parallel-architecture turbo codes

Dae Son Kim, Hyun Young Oh, Hong Yeop Song

Department of Electrical and Electronic Engineering

Research output: Contribution to journal › Article › peer-review

2 Citations (Scopus)

Abstract

In parallel-architecture turbo codes, the constituent interleavers must avoid memory collision. This paper proposes a collision-free interleaver structure composed of a Latin square (LS) and pre-designed interleavers. Our proposed interleavers can be easily optimized for various information block sizes and for various degrees of parallelism. Their performances were evaluated by computer simulation.

Original language	English
Pages (from-to)	203-205
Number of pages	3
Journal	IEEE Communications Letters
Volume	12
Issue number	3
DOIs	https://doi.org/10.1109/LCOMM.2008.071423
Publication status	Published - 2008 Mar

Bibliographical note

Funding Information:
Manuscript received August 27, 2007. The associate editor coordinating the review of this letter and approving it for publication was D. Tuninetti. Support for this work was provided in part by Samsung Electronics under the project on 4G wireless communication systems. D.-S. Kim and H.-Y. Song are with the Department of Electrical and Electronic Engineering, Yonsei University, Seoul, Korea. H.-Y. Oh is with Samsung Electronics Co. Suwon, Korea (e-mail: ds.kim@yonsei.ac.kr). Digital Object Identifier 10.1109/LCOMM.2008.071423.

All Science Journal Classification (ASJC) codes

Modelling and Simulation
Computer Science Applications
Electrical and Electronic Engineering

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10.1109/LCOMM.2008.071423

Cite this

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abstract = "In parallel-architecture turbo codes, the constituent interleavers must avoid memory collision. This paper proposes a collision-free interleaver structure composed of a Latin square (LS) and pre-designed interleavers. Our proposed interleavers can be easily optimized for various information block sizes and for various degrees of parallelism. Their performances were evaluated by computer simulation.",

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Collision-free interleaver composed of a latin square for parallel-architecture turbo codes

Abstract

Bibliographical note

All Science Journal Classification (ASJC) codes

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