BODCA: Heterogeneous CPU-GPU computing system with Bandwidth-Optimized DRAM cache design

Sungji Choi; Won Woo Ro

doi:10.1109/ICCE-Asia49877.2020.9276874

BODCA: Heterogeneous CPU-GPU computing system with Bandwidth-Optimized DRAM cache design

Sungji Choi, Won Woo Ro

Department of Electrical and Electronic Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

2 Citations (Scopus)

Abstract

Heterogeneous CPU-GPU computing is important due to multi-core CPU and GPU. In heterogeneous CPUGPU computing, cache coherence and unified memory spaces allow CPU and GPU cores to access the same memories without memory copy overheads. This paper focuses on the potential of the large-scale DRAM cache design in a heterogeneous computing simulation, considering the tradeoff of DRAM cache design. Also, this paper analyzes the improved latency and utilization of the system bandwidth of DRAM cache design. We propose a Bandwidth Optimized DRAM cache (BODCA), which is similar to Alloy Cache but has a dynamic bandwidth assignment technique. On average, BODCA shows 5.1% IPC improvement and 7.3% increment in the utilization of the memory system bandwidth compared to the Alloy Cache.

Original language	English
Title of host publication	2020 IEEE International Conference on Consumer Electronics - Asia, ICCE-Asia 2020
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781728161648
DOIs	https://doi.org/10.1109/ICCE-Asia49877.2020.9276874
Publication status	Published - 2020 Nov 1
Event	2020 IEEE International Conference on Consumer Electronics - Asia, ICCE-Asia 2020 - Seoul, Korea, Republic of Duration: 2020 Nov 1 → 2020 Nov 3

Publication series

Name	2020 IEEE International Conference on Consumer Electronics - Asia, ICCE-Asia 2020

Conference

Conference	2020 IEEE International Conference on Consumer Electronics - Asia, ICCE-Asia 2020
Country/Territory	Korea, Republic of
City	Seoul
Period	20/11/1 → 20/11/3

Bibliographical note

Publisher Copyright:
© 2020 IEEE.

All Science Journal Classification (ASJC) codes

Computer Science Applications
Electrical and Electronic Engineering
Media Technology
Instrumentation

Access to Document

10.1109/ICCE-Asia49877.2020.9276874

Cite this

Choi, S., & Ro, W. W. (2020). BODCA: Heterogeneous CPU-GPU computing system with Bandwidth-Optimized DRAM cache design. In 2020 IEEE International Conference on Consumer Electronics - Asia, ICCE-Asia 2020 Article 9276874 (2020 IEEE International Conference on Consumer Electronics - Asia, ICCE-Asia 2020). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICCE-Asia49877.2020.9276874

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title = "BODCA: Heterogeneous CPU-GPU computing system with Bandwidth-Optimized DRAM cache design",

abstract = "Heterogeneous CPU-GPU computing is important due to multi-core CPU and GPU. In heterogeneous CPUGPU computing, cache coherence and unified memory spaces allow CPU and GPU cores to access the same memories without memory copy overheads. This paper focuses on the potential of the large-scale DRAM cache design in a heterogeneous computing simulation, considering the tradeoff of DRAM cache design. Also, this paper analyzes the improved latency and utilization of the system bandwidth of DRAM cache design. We propose a Bandwidth Optimized DRAM cache (BODCA), which is similar to Alloy Cache but has a dynamic bandwidth assignment technique. On average, BODCA shows 5.1% IPC improvement and 7.3% increment in the utilization of the memory system bandwidth compared to the Alloy Cache.",

keywords = "DRAM cache, Dynamic bandwidth assignment technique, Heterogeneous computing",

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doi = "10.1109/ICCE-Asia49877.2020.9276874",

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Choi, S & Ro, WW 2020, BODCA: Heterogeneous CPU-GPU computing system with Bandwidth-Optimized DRAM cache design. in 2020 IEEE International Conference on Consumer Electronics - Asia, ICCE-Asia 2020., 9276874, 2020 IEEE International Conference on Consumer Electronics - Asia, ICCE-Asia 2020, Institute of Electrical and Electronics Engineers Inc., 2020 IEEE International Conference on Consumer Electronics - Asia, ICCE-Asia 2020, Seoul, Korea, Republic of, 20/11/1. https://doi.org/10.1109/ICCE-Asia49877.2020.9276874

BODCA: Heterogeneous CPU-GPU computing system with Bandwidth-Optimized DRAM cache design. / Choi, Sungji; Ro, Won Woo.
2020 IEEE International Conference on Consumer Electronics - Asia, ICCE-Asia 2020. Institute of Electrical and Electronics Engineers Inc., 2020. 9276874 (2020 IEEE International Conference on Consumer Electronics - Asia, ICCE-Asia 2020).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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AU - Choi, Sungji

AU - Ro, Won Woo

PY - 2020/11/1

Y1 - 2020/11/1

N2 - Heterogeneous CPU-GPU computing is important due to multi-core CPU and GPU. In heterogeneous CPUGPU computing, cache coherence and unified memory spaces allow CPU and GPU cores to access the same memories without memory copy overheads. This paper focuses on the potential of the large-scale DRAM cache design in a heterogeneous computing simulation, considering the tradeoff of DRAM cache design. Also, this paper analyzes the improved latency and utilization of the system bandwidth of DRAM cache design. We propose a Bandwidth Optimized DRAM cache (BODCA), which is similar to Alloy Cache but has a dynamic bandwidth assignment technique. On average, BODCA shows 5.1% IPC improvement and 7.3% increment in the utilization of the memory system bandwidth compared to the Alloy Cache.

AB - Heterogeneous CPU-GPU computing is important due to multi-core CPU and GPU. In heterogeneous CPUGPU computing, cache coherence and unified memory spaces allow CPU and GPU cores to access the same memories without memory copy overheads. This paper focuses on the potential of the large-scale DRAM cache design in a heterogeneous computing simulation, considering the tradeoff of DRAM cache design. Also, this paper analyzes the improved latency and utilization of the system bandwidth of DRAM cache design. We propose a Bandwidth Optimized DRAM cache (BODCA), which is similar to Alloy Cache but has a dynamic bandwidth assignment technique. On average, BODCA shows 5.1% IPC improvement and 7.3% increment in the utilization of the memory system bandwidth compared to the Alloy Cache.

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KW - Dynamic bandwidth assignment technique

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M3 - Conference contribution

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Choi S, Ro WW. BODCA: Heterogeneous CPU-GPU computing system with Bandwidth-Optimized DRAM cache design. In 2020 IEEE International Conference on Consumer Electronics - Asia, ICCE-Asia 2020. Institute of Electrical and Electronics Engineers Inc. 2020. 9276874. (2020 IEEE International Conference on Consumer Electronics - Asia, ICCE-Asia 2020). doi: 10.1109/ICCE-Asia49877.2020.9276874

BODCA: Heterogeneous CPU-GPU computing system with Bandwidth-Optimized DRAM cache design

Abstract

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