Abstract
This paper presents an automatic program synthesis system which generates VHDL models for digital simulators. Behavioral and structural models can be generated from Boolean equations, truth tables, HDL descriptions or schematic diagrams. This system provides an efficient method for automatic model development, which is one of the most difficult task, in a simulation environment.
| Original language | English |
|---|---|
| Title of host publication | IFIP Transactions A |
| Subtitle of host publication | Computer Science and Technology |
| Publisher | Publ by Elsevier Science Publishers B.V. |
| Pages | 353-360 |
| Number of pages | 8 |
| Edition | A-32 |
| ISBN (Print) | 0444816410 |
| Publication status | Published - 1993 |
| Event | Proceedings of the 11th IFIP WG10.2 International Conference on Computer Hardware Description Languages and their Applications - CHDL'93 - Ottawa, Ont, Can Duration: 1993 Apr 26 → 1993 Apr 28 |
Other
| Other | Proceedings of the 11th IFIP WG10.2 International Conference on Computer Hardware Description Languages and their Applications - CHDL'93 |
|---|---|
| City | Ottawa, Ont, Can |
| Period | 93/4/26 → 93/4/28 |
All Science Journal Classification (ASJC) codes
- Engineering(all)