TY - GEN
T1 - Analysis of signal integrity/power integrity in multilayer printed circuit board and two improving methods
AU - Kang, Hee Do
AU - Kim, Hyun
AU - Yook, Jong Gwan
PY - 2008
Y1 - 2008
N2 - The signal integrity (SI) and power integrity (PI) in multilayer printed circuit board is analyzed using three-dimensional (3D) full EM simulation and the circuit simulation. As a result of that, the dominant factor of SI/PI on the test board is noise coupling by GND via. Hence, two methods are applied to suppress the coupling; differential signaling and anti-via structure. Using these two methods, the noise on the signal line and power via can be suppressed, remarkably. Therefore, the SI/PI in multilayer PCB can be guaranteed to the low noise level.
AB - The signal integrity (SI) and power integrity (PI) in multilayer printed circuit board is analyzed using three-dimensional (3D) full EM simulation and the circuit simulation. As a result of that, the dominant factor of SI/PI on the test board is noise coupling by GND via. Hence, two methods are applied to suppress the coupling; differential signaling and anti-via structure. Using these two methods, the noise on the signal line and power via can be suppressed, remarkably. Therefore, the SI/PI in multilayer PCB can be guaranteed to the low noise level.
UR - http://www.scopus.com/inward/record.url?scp=60649095880&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=60649095880&partnerID=8YFLogxK
U2 - 10.1109/EDAPS.2008.4736037
DO - 10.1109/EDAPS.2008.4736037
M3 - Conference contribution
AN - SCOPUS:60649095880
SN - 9781424426331
T3 - 2008 Electrical Design of Advanced Packaging and Systems Symposium, IEEE EDAPS 2008 - Proceedings
SP - 210
EP - 213
BT - 2008 Electrical Design of Advanced Packaging and Systems Symposium, IEEE EDAPS 2008 - Proceedings
T2 - 2008 Electrical Design of Advanced Packaging and Systems Symposium, IEEE EDAPS 2008
Y2 - 10 December 2008 through 12 December 2008
ER -