Abstract
For the first time, fully working 512Mb DRAMs have been developed successfully using an 80nm DRAM technology, which is the smallest feature size in DRAM technology ever reported. With an ArF lithography, Recess-Channel-Array-Transistor (RCAT), low-temperature MIS capacitor technologies and a newly developed Top Spacer storage node Contact (TSC), we have realized these 512Mb DRAMs. Also, we have reduced process steps including the layer requiring ArF lithography by using TSC process.
Original language | English |
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Pages (from-to) | 411-414 |
Number of pages | 4 |
Journal | Technical Digest - International Electron Devices Meeting |
Publication status | Published - 2003 |
Event | IEEE International Electron Devices Meeting - Washington, DC, United States Duration: 2003 Dec 8 → 2003 Dec 10 |
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Condensed Matter Physics
- Materials Chemistry
- Electrical and Electronic Engineering