An Outstanding and Highly Manufacturable 80nm DRAM Technology

H. S. Kim; D. H. Kim; J. M. Park; Y. S. Hwang; M. Huh; H. K. Hwang; N. J. Kang; B. H. Lee; M. H. Cho; S. E. Kim; J. Y. Kim; B. J. Park; J. W. Lee; D. I. Kim; M. Y. Jeong; H. J. Kim; Y. J. Park; Kinam Kim

An Outstanding and Highly Manufacturable 80nm DRAM Technology

H. S. Kim, D. H. Kim, J. M. Park, Y. S. Hwang, M. Huh, H. K. Hwang, N. J. Kang, B. H. Lee, M. H. Cho, S. E. Kim, J. Y. Kim, B. J. Park, J. W. Lee, D. I. Kim, M. Y. Jeong, H. J. Kim, Y. J. Park, Kinam Kim

Department of Physics

Research output: Contribution to journal › Conference article › peer-review

14 Citations (Scopus)

Abstract

For the first time, fully working 512Mb DRAMs have been developed successfully using an 80nm DRAM technology, which is the smallest feature size in DRAM technology ever reported. With an ArF lithography, Recess-Channel-Array-Transistor (RCAT), low-temperature MIS capacitor technologies and a newly developed Top Spacer storage node Contact (TSC), we have realized these 512Mb DRAMs. Also, we have reduced process steps including the layer requiring ArF lithography by using TSC process.

Original language	English
Pages (from-to)	411-414
Number of pages	4
Journal	Technical Digest - International Electron Devices Meeting
Publication status	Published - 2003
Event	IEEE International Electron Devices Meeting - Washington, DC, United States Duration: 2003 Dec 8 → 2003 Dec 10

All Science Journal Classification (ASJC) codes

Electronic, Optical and Magnetic Materials
Condensed Matter Physics
Materials Chemistry
Electrical and Electronic Engineering

Cite this

@article{8ef2e0b5940e46a4b1d4f9855ac1724b,

title = "An Outstanding and Highly Manufacturable 80nm DRAM Technology",

abstract = "For the first time, fully working 512Mb DRAMs have been developed successfully using an 80nm DRAM technology, which is the smallest feature size in DRAM technology ever reported. With an ArF lithography, Recess-Channel-Array-Transistor (RCAT), low-temperature MIS capacitor technologies and a newly developed Top Spacer storage node Contact (TSC), we have realized these 512Mb DRAMs. Also, we have reduced process steps including the layer requiring ArF lithography by using TSC process.",

author = "Kim, {H. S.} and Kim, {D. H.} and Park, {J. M.} and Hwang, {Y. S.} and M. Huh and Hwang, {H. K.} and Kang, {N. J.} and Lee, {B. H.} and Cho, {M. H.} and Kim, {S. E.} and Kim, {J. Y.} and Park, {B. J.} and Lee, {J. W.} and Kim, {D. I.} and Jeong, {M. Y.} and Kim, {H. J.} and Park, {Y. J.} and Kinam Kim",

year = "2003",

language = "English",

pages = "411--414",

journal = "Technical Digest - International Electron Devices Meeting",

issn = "0163-1918",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "IEEE International Electron Devices Meeting ; Conference date: 08-12-2003 Through 10-12-2003",

}

TY - JOUR

T1 - An Outstanding and Highly Manufacturable 80nm DRAM Technology

AU - Kim, H. S.

AU - Kim, D. H.

AU - Park, J. M.

AU - Hwang, Y. S.

AU - Huh, M.

AU - Hwang, H. K.

AU - Kang, N. J.

AU - Lee, B. H.

AU - Cho, M. H.

AU - Kim, S. E.

AU - Kim, J. Y.

AU - Park, B. J.

AU - Lee, J. W.

AU - Kim, D. I.

AU - Jeong, M. Y.

AU - Kim, H. J.

AU - Park, Y. J.

AU - Kim, Kinam

PY - 2003

Y1 - 2003

N2 - For the first time, fully working 512Mb DRAMs have been developed successfully using an 80nm DRAM technology, which is the smallest feature size in DRAM technology ever reported. With an ArF lithography, Recess-Channel-Array-Transistor (RCAT), low-temperature MIS capacitor technologies and a newly developed Top Spacer storage node Contact (TSC), we have realized these 512Mb DRAMs. Also, we have reduced process steps including the layer requiring ArF lithography by using TSC process.

AB - For the first time, fully working 512Mb DRAMs have been developed successfully using an 80nm DRAM technology, which is the smallest feature size in DRAM technology ever reported. With an ArF lithography, Recess-Channel-Array-Transistor (RCAT), low-temperature MIS capacitor technologies and a newly developed Top Spacer storage node Contact (TSC), we have realized these 512Mb DRAMs. Also, we have reduced process steps including the layer requiring ArF lithography by using TSC process.

UR - http://www.scopus.com/inward/record.url?scp=0842266603&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0842266603&partnerID=8YFLogxK

M3 - Conference article

AN - SCOPUS:0842266603

SN - 0163-1918

SP - 411

EP - 414

JO - Technical Digest - International Electron Devices Meeting

JF - Technical Digest - International Electron Devices Meeting

T2 - IEEE International Electron Devices Meeting

Y2 - 8 December 2003 through 10 December 2003

ER -

An Outstanding and Highly Manufacturable 80nm DRAM Technology

Abstract

All Science Journal Classification (ASJC) codes

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