An Outstanding and Highly Manufacturable 80nm DRAM Technology

H. S. Kim, D. H. Kim, J. M. Park, Y. S. Hwang, M. Huh, H. K. Hwang, N. J. Kang, B. H. Lee, M. H. Cho, S. E. Kim, J. Y. Kim, B. J. Park, J. W. Lee, D. I. Kim, M. Y. Jeong, H. J. Kim, Y. J. Park, Kinam Kim

Research output: Contribution to journalConference articlepeer-review

14 Citations (Scopus)


For the first time, fully working 512Mb DRAMs have been developed successfully using an 80nm DRAM technology, which is the smallest feature size in DRAM technology ever reported. With an ArF lithography, Recess-Channel-Array-Transistor (RCAT), low-temperature MIS capacitor technologies and a newly developed Top Spacer storage node Contact (TSC), we have realized these 512Mb DRAMs. Also, we have reduced process steps including the layer requiring ArF lithography by using TSC process.

Original languageEnglish
Pages (from-to)411-414
Number of pages4
JournalTechnical Digest - International Electron Devices Meeting
Publication statusPublished - 2003
EventIEEE International Electron Devices Meeting - Washington, DC, United States
Duration: 2003 Dec 82003 Dec 10

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Materials Chemistry
  • Electrical and Electronic Engineering


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