An Offset-Canceled Sense Amplifier for DRAMs With Hidden Offset-Cancellation Time and Boosted Internal-Voltage-Difference

A degraded sensing margin with DRAM technology scaling is one of the most important issues in the modern DRAM industry since it causes two sensing failure problems due to 1) offset voltage of the sense amplifier (V textsubscript OS) and 2) slow sensing time (t textsubscript SEN). Most previous works mainly have focused on the sensing failure problem due to 1) that requires an additional offset-cancellation time (tOC) for reducing the V textsubscript OS. In this brief, we propose a hidden rm tOC and boosted internal-voltage-difference (BIVD) offset-canceled sense amplifier (HB-OCSA) to resolve both sensing failure problems. To reduce the t textsubscript SEN, the tOC is hidden by performing offset-cancellation and charge-sharing simultaneously. In addition, the proposed BIVD scheme not only further accelerates tSEN with the improved sensing margin but also reduces the energy consumption in the sensing operation. The proposed HB-OCSA achieves 1.52 times faster tSEN and reduces energy consumption by 36.23% at 0.9V compared to a recently proposed capacitor-coupled offset-canceled sense amplifier (COSA) while keeping a 100% sensing yield.