An energy efficient cache memory architecture for embedded systems

This paper proposes a modified two-way set associative cache for embedded systems to reduce the energy consumption. For this goal, the proposed cache, called SSA (selective-way-access skewed associative) cache, equips with a way-selecting mechanism controlled by skewing function and small table lookup, which also has the reconfigurable ability to be converted to one direct mapped cache on a specific application. The skewing mechanism including differentiated mapping function for each cache set, and specialized replacement policy enables the perfect speculation in way-selection and decreases conflict misses. Consequently, the proposed cache effectively achieves the energy reduction without any performance degradation. Additional delay of a small table look-up for the way selection can be hidden partly and multiplexer delay in critical path can be removed totally, such that overall cache access time becomes almost same as that of conventional set associative cache. The simulation result shows that the proposed cache structure reduces energy consumption up to 30∼55% over conventional set associative cache and up to 25∼30% over previous way-prediction caches. Furthermore, the software controlled reconfigurable architecture brings flexibility with the proposed cache to operate as direct mapped cache or way selecting cache based on given application adaptively.