An efficient self post package repair algorithm and implementation in memory system with on-chip-ECC

Yun Sang Lee; Jung Bae Lee; Chang Hyun Kim; Sang Uhn Cha; Hongil Yoon

doi:10.1109/ASSCC.2006.357918

An efficient self post package repair algorithm and implementation in memory system with on-chip-ECC

Yun Sang Lee, Jung Bae Lee, Chang Hyun Kim, Sang Uhn Cha, Hongil Yoon

Department of Electrical and Electronic Engineering

Research output: Contribution to conference › Paper › peer-review

1 Citation (Scopus)

Abstract

An efficient self post package repair algorithm using on-chip-ECC is proposed and the circuit implementation details are presented. The proposed algorithm identifies and stores the addresses of hard fault detected by on-chip-ECC during post package test phase and performs subsequent repairs with changing supply voltage level controlled by tester. A yield improvement by 1∼1.5% is expected and the efficiency of test and repair steps is enhanced by about 58∼67%. The chip size overhead for its implementation is estimated to be under 0.4% for an 80nm 1Gb memory.

Original language	English
Pages	331-334
Number of pages	4
DOIs	https://doi.org/10.1109/ASSCC.2006.357918
Publication status	Published - 2006
Event	2006 IEEE Asian Solid-State Circuits Conference, ASSCC 2006 - Hangzhou, China Duration: 2006 Nov 13 → 2006 Nov 15

Other

Other	2006 IEEE Asian Solid-State Circuits Conference, ASSCC 2006
Country/Territory	China
City	Hangzhou
Period	06/11/13 → 06/11/15

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering
Electronic, Optical and Magnetic Materials

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10.1109/ASSCC.2006.357918

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title = "An efficient self post package repair algorithm and implementation in memory system with on-chip-ECC",

abstract = "An efficient self post package repair algorithm using on-chip-ECC is proposed and the circuit implementation details are presented. The proposed algorithm identifies and stores the addresses of hard fault detected by on-chip-ECC during post package test phase and performs subsequent repairs with changing supply voltage level controlled by tester. A yield improvement by 1∼1.5% is expected and the efficiency of test and repair steps is enhanced by about 58∼67%. The chip size overhead for its implementation is estimated to be under 0.4% for an 80nm 1Gb memory.",

author = "Lee, {Yun Sang} and Lee, {Jung Bae} and Kim, {Chang Hyun} and Cha, {Sang Uhn} and Hongil Yoon",

year = "2006",

doi = "10.1109/ASSCC.2006.357918",

language = "English",

pages = "331--334",

note = "2006 IEEE Asian Solid-State Circuits Conference, ASSCC 2006 ; Conference date: 13-11-2006 Through 15-11-2006",

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AU - Lee, Yun Sang

AU - Lee, Jung Bae

AU - Kim, Chang Hyun

AU - Cha, Sang Uhn

AU - Yoon, Hongil

PY - 2006

Y1 - 2006

N2 - An efficient self post package repair algorithm using on-chip-ECC is proposed and the circuit implementation details are presented. The proposed algorithm identifies and stores the addresses of hard fault detected by on-chip-ECC during post package test phase and performs subsequent repairs with changing supply voltage level controlled by tester. A yield improvement by 1∼1.5% is expected and the efficiency of test and repair steps is enhanced by about 58∼67%. The chip size overhead for its implementation is estimated to be under 0.4% for an 80nm 1Gb memory.

AB - An efficient self post package repair algorithm using on-chip-ECC is proposed and the circuit implementation details are presented. The proposed algorithm identifies and stores the addresses of hard fault detected by on-chip-ECC during post package test phase and performs subsequent repairs with changing supply voltage level controlled by tester. A yield improvement by 1∼1.5% is expected and the efficiency of test and repair steps is enhanced by about 58∼67%. The chip size overhead for its implementation is estimated to be under 0.4% for an 80nm 1Gb memory.

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M3 - Paper

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EP - 334

T2 - 2006 IEEE Asian Solid-State Circuits Conference, ASSCC 2006

Y2 - 13 November 2006 through 15 November 2006

ER -

An efficient self post package repair algorithm and implementation in memory system with on-chip-ECC

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