An effective test pattern generation for testing signal integrity

Yongjoon Kim; Myung Hoon Yang; Youngkyu Park; Dae Yeal Lee; Sungho Kang

doi:10.1109/ATS.2006.261032

An effective test pattern generation for testing signal integrity

Yongjoon Kim, Myung Hoon Yang, Youngkyu Park, Dae Yeal Lee, Sungho Kang

Department of Electrical and Electronic Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

1 Citation (Scopus)

Abstract

As more cores are integrated in a single chip with sophisticated process like nano technology, testing signal integrity between the cores needs much effort due to complicate coupling effects. In this paper, we propose a novel test pattern generation method for testing signal integrity. Using this method, short and effective test patterns are generated with low hardware overhead. It can be used for self-test scheme and experimental results show the effectiveness of the proposed scheme.

Original language	English
Title of host publication	Proceedings of the 15th Asian Test Symposium 2006
Pages	279-284
Number of pages	6
DOIs	https://doi.org/10.1109/ATS.2006.261032
Publication status	Published - 2006
Event	15th Asian Test Symposium 2006 - Fukuoka, Japan Duration: 2006 Nov 20 → 2006 Nov 23

Publication series

Name	Proceedings of the Asian Test Symposium
Volume	2006
ISSN (Print)	1081-7735

Other

Other	15th Asian Test Symposium 2006
Country/Territory	Japan
City	Fukuoka
Period	06/11/20 → 06/11/23

Bibliographical note

Funding Information:
This research was supported in part by a research grant from Southern Illinois University at Edwardsville. I thank graduate students, HyungJun Cho, Ming Zhou, and Murali Neralla, for their assistance in coding the analytical method and simulation and running the experiments. I also thank the department editor and anonymous referees for their useful comments.

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering

Access to Document

10.1109/ATS.2006.261032

Cite this

@inproceedings{c69a936203c84f3a9fb4601b9f64f305,

title = "An effective test pattern generation for testing signal integrity",

abstract = "As more cores are integrated in a single chip with sophisticated process like nano technology, testing signal integrity between the cores needs much effort due to complicate coupling effects. In this paper, we propose a novel test pattern generation method for testing signal integrity. Using this method, short and effective test patterns are generated with low hardware overhead. It can be used for self-test scheme and experimental results show the effectiveness of the proposed scheme.",

author = "Yongjoon Kim and Yang, {Myung Hoon} and Youngkyu Park and Lee, {Dae Yeal} and Sungho Kang",

note = "Funding Information: This research was supported in part by a research grant from Southern Illinois University at Edwardsville. I thank graduate students, HyungJun Cho, Ming Zhou, and Murali Neralla, for their assistance in coding the analytical method and simulation and running the experiments. I also thank the department editor and anonymous referees for their useful comments.; 15th Asian Test Symposium 2006 ; Conference date: 20-11-2006 Through 23-11-2006",

year = "2006",

doi = "10.1109/ATS.2006.261032",

language = "English",

isbn = "0769526284",

series = "Proceedings of the Asian Test Symposium",

pages = "279--284",

booktitle = "Proceedings of the 15th Asian Test Symposium 2006",

}

TY - GEN

T1 - An effective test pattern generation for testing signal integrity

AU - Kim, Yongjoon

AU - Yang, Myung Hoon

AU - Park, Youngkyu

AU - Lee, Dae Yeal

AU - Kang, Sungho

N1 - Funding Information: This research was supported in part by a research grant from Southern Illinois University at Edwardsville. I thank graduate students, HyungJun Cho, Ming Zhou, and Murali Neralla, for their assistance in coding the analytical method and simulation and running the experiments. I also thank the department editor and anonymous referees for their useful comments.

PY - 2006

Y1 - 2006

N2 - As more cores are integrated in a single chip with sophisticated process like nano technology, testing signal integrity between the cores needs much effort due to complicate coupling effects. In this paper, we propose a novel test pattern generation method for testing signal integrity. Using this method, short and effective test patterns are generated with low hardware overhead. It can be used for self-test scheme and experimental results show the effectiveness of the proposed scheme.

AB - As more cores are integrated in a single chip with sophisticated process like nano technology, testing signal integrity between the cores needs much effort due to complicate coupling effects. In this paper, we propose a novel test pattern generation method for testing signal integrity. Using this method, short and effective test patterns are generated with low hardware overhead. It can be used for self-test scheme and experimental results show the effectiveness of the proposed scheme.

UR - http://www.scopus.com/inward/record.url?scp=33947634054&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=33947634054&partnerID=8YFLogxK

U2 - 10.1109/ATS.2006.261032

DO - 10.1109/ATS.2006.261032

M3 - Conference contribution

AN - SCOPUS:33947634054

SN - 0769526284

SN - 9780769526287

T3 - Proceedings of the Asian Test Symposium

SP - 279

EP - 284

BT - Proceedings of the 15th Asian Test Symposium 2006

T2 - 15th Asian Test Symposium 2006

Y2 - 20 November 2006 through 23 November 2006

ER -

An effective test pattern generation for testing signal integrity

Abstract

Publication series

Other

Bibliographical note

All Science Journal Classification (ASJC) codes

Access to Document

Other files and links

Fingerprint

Cite this