An Always-on 4× Compressive VGA CMOS Imager with 51pJ/Pixel and >32dB PSNR

Wenda Zhao; Chanmin Park; Injun Park; Nan Sun; Youngcheol Chae

doi:10.1109/VLSICircuits18222.2020.9162897

An Always-on 4× Compressive VGA CMOS Imager with 51pJ/Pixel and >32dB PSNR

Wenda Zhao, Chanmin Park, Injun Park, Nan Sun, Youngcheol Chae

Department of Electrical and Electronic Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

3 Citations (Scopus)

Abstract

This paper presents a 4× compressive CMOS imager for always-on operation that achieves an energy efficiency of 51pJ/pixel, while maintaining high image quality of PSNR>32dB and SSIM>0.84. This is enabled by an energy-efficient compressive-sensing (CS) encoder, which replaces a densely populated CS encoding method with a highly sparse pseudo-diagonal one. Since the proposed CS encoder can be implemented with an energy-efficient switched-capacitor matrix multiplier at pixel outputs, data compression is achieved prior to pixel digitization, thereby greatly reducing ADC power, data size, and I/O power. The energy efficiency of the imager is further improved by incorporating it into dynamic single-slope ADCs. A prototype VGA imager consumes only 0.7mW at 45 fps. The corresponding energy per pixel (51pJ/pixel) amounts to a 20× improvement over the previous low-energy benchmark on CS imagers.

Original language	English
Title of host publication	2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020 - Proceedings
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781728199429
DOIs	https://doi.org/10.1109/VLSICircuits18222.2020.9162897
Publication status	Published - 2020 Jun
Event	2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020 - Honolulu, United States Duration: 2020 Jun 16 → 2020 Jun 19

Publication series

Name	IEEE Symposium on VLSI Circuits, Digest of Technical Papers
Volume	2020-June

Conference

Conference	2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020
Country/Territory	United States
City	Honolulu
Period	20/6/16 → 20/6/19

Bibliographical note

Publisher Copyright:
© 2020 IEEE.

All Science Journal Classification (ASJC) codes

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

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10.1109/VLSICircuits18222.2020.9162897

Cite this

Zhao, W., Park, C., Park, I., Sun, N., & Chae, Y. (2020). An Always-on 4× Compressive VGA CMOS Imager with 51pJ/Pixel and >32dB PSNR. In 2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020 - Proceedings Article 9162897 (IEEE Symposium on VLSI Circuits, Digest of Technical Papers; Vol. 2020-June). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSICircuits18222.2020.9162897

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abstract = "This paper presents a 4× compressive CMOS imager for always-on operation that achieves an energy efficiency of 51pJ/pixel, while maintaining high image quality of PSNR>32dB and SSIM>0.84. This is enabled by an energy-efficient compressive-sensing (CS) encoder, which replaces a densely populated CS encoding method with a highly sparse pseudo-diagonal one. Since the proposed CS encoder can be implemented with an energy-efficient switched-capacitor matrix multiplier at pixel outputs, data compression is achieved prior to pixel digitization, thereby greatly reducing ADC power, data size, and I/O power. The energy efficiency of the imager is further improved by incorporating it into dynamic single-slope ADCs. A prototype VGA imager consumes only 0.7mW at 45 fps. The corresponding energy per pixel (51pJ/pixel) amounts to a 20× improvement over the previous low-energy benchmark on CS imagers.",

author = "Wenda Zhao and Chanmin Park and Injun Park and Nan Sun and Youngcheol Chae",

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Zhao, W, Park, C, Park, I, Sun, N & Chae, Y 2020, An Always-on 4× Compressive VGA CMOS Imager with 51pJ/Pixel and >32dB PSNR. in 2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020 - Proceedings., 9162897, IEEE Symposium on VLSI Circuits, Digest of Technical Papers, vol. 2020-June, Institute of Electrical and Electronics Engineers Inc., 2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020, Honolulu, United States, 20/6/16. https://doi.org/10.1109/VLSICircuits18222.2020.9162897

An Always-on 4× Compressive VGA CMOS Imager with 51pJ/Pixel and >32dB PSNR. / Zhao, Wenda; Park, Chanmin; Park, Injun et al.
2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2020. 9162897 (IEEE Symposium on VLSI Circuits, Digest of Technical Papers; Vol. 2020-June).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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N2 - This paper presents a 4× compressive CMOS imager for always-on operation that achieves an energy efficiency of 51pJ/pixel, while maintaining high image quality of PSNR>32dB and SSIM>0.84. This is enabled by an energy-efficient compressive-sensing (CS) encoder, which replaces a densely populated CS encoding method with a highly sparse pseudo-diagonal one. Since the proposed CS encoder can be implemented with an energy-efficient switched-capacitor matrix multiplier at pixel outputs, data compression is achieved prior to pixel digitization, thereby greatly reducing ADC power, data size, and I/O power. The energy efficiency of the imager is further improved by incorporating it into dynamic single-slope ADCs. A prototype VGA imager consumes only 0.7mW at 45 fps. The corresponding energy per pixel (51pJ/pixel) amounts to a 20× improvement over the previous low-energy benchmark on CS imagers.

AB - This paper presents a 4× compressive CMOS imager for always-on operation that achieves an energy efficiency of 51pJ/pixel, while maintaining high image quality of PSNR>32dB and SSIM>0.84. This is enabled by an energy-efficient compressive-sensing (CS) encoder, which replaces a densely populated CS encoding method with a highly sparse pseudo-diagonal one. Since the proposed CS encoder can be implemented with an energy-efficient switched-capacitor matrix multiplier at pixel outputs, data compression is achieved prior to pixel digitization, thereby greatly reducing ADC power, data size, and I/O power. The energy efficiency of the imager is further improved by incorporating it into dynamic single-slope ADCs. A prototype VGA imager consumes only 0.7mW at 45 fps. The corresponding energy per pixel (51pJ/pixel) amounts to a 20× improvement over the previous low-energy benchmark on CS imagers.

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An Always-on 4× Compressive VGA CMOS Imager with 51pJ/Pixel and >32dB PSNR

Abstract

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