Algorithm-Switching-Based Last-Level Cache Structure with Hybrid Main Memory Architecture

Xian Shu Li, Su Kyung Yoon, Jeong Geun Kim, Bernd Burgstaller, Shin Dug Kim

Research output: Contribution to journalArticlepeer-review

Abstract

In this research, we designed an algorithm-switching (AS)-based last-level cache (LLC) structure with DRAM-NAND Flash hybrid main memory architecture. In order to take full advantage of previous memory access patterns and achieve high performance in the upper level of memory hierarchy, an AS-based clustering engine that uses k-means, k-medoids and k-center clustering algorithms was applied to LLC. The proposed LLC consists of three major parts, namely a set-divisible cache, and victim and clustering buffers. The victim and clustering buffers efficiently managed the history of cache blocks evicted from the set-divisible cache through the AS-based engine mechanism. The experimental results that were evaluated using Redis application and YCSB benchmark show that compared with conventional LLC structure, the proposed AS-based LLC structure could reduce the total execution time by 19.50%, power consumption by 16.31%, and NAND-Flash memory write count by 8.6%.

Original languageEnglish
Pages (from-to)123-136
Number of pages14
JournalComputer Journal
Volume63
Issue number1
DOIs
Publication statusPublished - 2020 Jan 17

Bibliographical note

Publisher Copyright:
© 2019 The British Computer Society 2019. All rights reserved. For permissions, please email: journals.permissions@oup.com.

All Science Journal Classification (ASJC) codes

  • General Computer Science

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