A selective filter-bank TLB system [embedded processor MMU for low power]

Jung Hoon Lee; Gi Ho Park; Sung Bae Park; Shin Dug Kim

doi:10.1109/LPE.2003.1231885

A selective filter-bank TLB system [embedded processor MMU for low power]

Jung Hoon Lee, Gi Ho Park, Sung Bae Park, Shin Dug Kim

College of Computing

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

1 Citation (Scopus)

Abstract

We present a selective filter-bank translation lookaside buffer (TLB) system with low power consumption for embedded processors. The proposed TLB is constructed as multiple banks with a small two-bank buffer, called a filter-bank buffer, located above its associated bank. Either a filter-bank buffer or a main bank TLB can be selectively accessed, based on two bits in the filter-bank buffer. Energy savings are achieved by reducing the number of entries accessed at a time, by using filtering and the bank mechanism. The overhead of the proposed TLB turns out to be negligible compared with other hierarchical structures. Simulation results show that the energy×delay product can be reduced by about 88% compared with a fully -associative TLB, 75% with respect to a filter-TLB, and 51% relative to a banked-filter TLB.

Original language	English
Title of host publication	ISLPED 2003 - Proceedings of the 2003 International Symposium on Low Power Electronics and Design
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	312-317
Number of pages	6
ISBN (Electronic)	158113682X
DOIs	https://doi.org/10.1109/LPE.2003.1231885
Publication status	Published - 2003
Event	2003 International Symposium on Low Power Electronics and Design, ISLPED 2003 - Seoul, Korea, Republic of Duration: 2003 Aug 25 → 2003 Aug 27

Publication series

Name	Proceedings of the International Symposium on Low Power Electronics and Design
Volume	2003-January
ISSN (Print)	1533-4678

Conference

Conference	2003 International Symposium on Low Power Electronics and Design, ISLPED 2003
Country/Territory	Korea, Republic of
City	Seoul
Period	03/8/25 → 03/8/27

Bibliographical note

Publisher Copyright:
© 2003 ACM.

All Science Journal Classification (ASJC) codes

Engineering(all)

Access to Document

10.1109/LPE.2003.1231885

Cite this

Lee, J. H., Park, G. H., Park, S. B., & Kim, S. D. (2003). A selective filter-bank TLB system [embedded processor MMU for low power]. In ISLPED 2003 - Proceedings of the 2003 International Symposium on Low Power Electronics and Design (pp. 312-317). [1231885] (Proceedings of the International Symposium on Low Power Electronics and Design; Vol. 2003-January). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/LPE.2003.1231885

Lee, Jung Hoon ; Park, Gi Ho ; Park, Sung Bae et al. / A selective filter-bank TLB system [embedded processor MMU for low power]. ISLPED 2003 - Proceedings of the 2003 International Symposium on Low Power Electronics and Design. Institute of Electrical and Electronics Engineers Inc., 2003. pp. 312-317 (Proceedings of the International Symposium on Low Power Electronics and Design).

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title = "A selective filter-bank TLB system [embedded processor MMU for low power]",

abstract = "We present a selective filter-bank translation lookaside buffer (TLB) system with low power consumption for embedded processors. The proposed TLB is constructed as multiple banks with a small two-bank buffer, called a filter-bank buffer, located above its associated bank. Either a filter-bank buffer or a main bank TLB can be selectively accessed, based on two bits in the filter-bank buffer. Energy savings are achieved by reducing the number of entries accessed at a time, by using filtering and the bank mechanism. The overhead of the proposed TLB turns out to be negligible compared with other hierarchical structures. Simulation results show that the energy×delay product can be reduced by about 88% compared with a fully -associative TLB, 75% with respect to a filter-TLB, and 51% relative to a banked-filter TLB.",

author = "Lee, {Jung Hoon} and Park, {Gi Ho} and Park, {Sung Bae} and Kim, {Shin Dug}",

note = "Publisher Copyright: {\textcopyright} 2003 ACM.; 2003 International Symposium on Low Power Electronics and Design, ISLPED 2003 ; Conference date: 25-08-2003 Through 27-08-2003",

year = "2003",

doi = "10.1109/LPE.2003.1231885",

language = "English",

series = "Proceedings of the International Symposium on Low Power Electronics and Design",

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Lee, JH, Park, GH, Park, SB & Kim, SD 2003, A selective filter-bank TLB system [embedded processor MMU for low power]. in ISLPED 2003 - Proceedings of the 2003 International Symposium on Low Power Electronics and Design., 1231885, Proceedings of the International Symposium on Low Power Electronics and Design, vol. 2003-January, Institute of Electrical and Electronics Engineers Inc., pp. 312-317, 2003 International Symposium on Low Power Electronics and Design, ISLPED 2003, Seoul, Korea, Republic of, 03/8/25. https://doi.org/10.1109/LPE.2003.1231885

A selective filter-bank TLB system [embedded processor MMU for low power]. / Lee, Jung Hoon; Park, Gi Ho; Park, Sung Bae et al.
ISLPED 2003 - Proceedings of the 2003 International Symposium on Low Power Electronics and Design. Institute of Electrical and Electronics Engineers Inc., 2003. p. 312-317 1231885 (Proceedings of the International Symposium on Low Power Electronics and Design; Vol. 2003-January).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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N2 - We present a selective filter-bank translation lookaside buffer (TLB) system with low power consumption for embedded processors. The proposed TLB is constructed as multiple banks with a small two-bank buffer, called a filter-bank buffer, located above its associated bank. Either a filter-bank buffer or a main bank TLB can be selectively accessed, based on two bits in the filter-bank buffer. Energy savings are achieved by reducing the number of entries accessed at a time, by using filtering and the bank mechanism. The overhead of the proposed TLB turns out to be negligible compared with other hierarchical structures. Simulation results show that the energy×delay product can be reduced by about 88% compared with a fully -associative TLB, 75% with respect to a filter-TLB, and 51% relative to a banked-filter TLB.

AB - We present a selective filter-bank translation lookaside buffer (TLB) system with low power consumption for embedded processors. The proposed TLB is constructed as multiple banks with a small two-bank buffer, called a filter-bank buffer, located above its associated bank. Either a filter-bank buffer or a main bank TLB can be selectively accessed, based on two bits in the filter-bank buffer. Energy savings are achieved by reducing the number of entries accessed at a time, by using filtering and the bank mechanism. The overhead of the proposed TLB turns out to be negligible compared with other hierarchical structures. Simulation results show that the energy×delay product can be reduced by about 88% compared with a fully -associative TLB, 75% with respect to a filter-TLB, and 51% relative to a banked-filter TLB.

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Lee JH, Park GH, Park SB, Kim SD. A selective filter-bank TLB system [embedded processor MMU for low power]. In ISLPED 2003 - Proceedings of the 2003 International Symposium on Low Power Electronics and Design. Institute of Electrical and Electronics Engineers Inc. 2003. p. 312-317. 1231885. (Proceedings of the International Symposium on Low Power Electronics and Design). doi: 10.1109/LPE.2003.1231885

A selective filter-bank TLB system [embedded processor MMU for low power]

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