A scan segment skip technique for low power test

Hayoung Lee, Junkyu Lee, Hyunyul Lim, Sungho Kang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

Excessive power consumption during testing has been one of the most important issues from the exponential advance in semiconductor manufacturing technology. In this paper, a scan segment skip technique is proposed to reduce power consumption by skipping segments that don't need scan in/out processes. Also, a new pattern merge algorithm is proposed for maximizing power reduction ratio. Experimental results show that the proposed technique efficiently reduces test power consumption with the minimal impact on area overhead.

Original languageEnglish
Title of host publicationISOCC 2015 - International SoC Design Conference
Subtitle of host publicationSoC for Internet of Everything (IoE)
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages127-128
Number of pages2
ISBN (Electronic)9781467393089
DOIs
Publication statusPublished - 2016 Feb 8
Event12th International SoC Design Conference, ISOCC 2015 - Gyeongju, Korea, Republic of
Duration: 2015 Nov 22015 Nov 5

Publication series

NameISOCC 2015 - International SoC Design Conference: SoC for Internet of Everything (IoE)

Other

Other12th International SoC Design Conference, ISOCC 2015
Country/TerritoryKorea, Republic of
CityGyeongju
Period15/11/215/11/5

Bibliographical note

Publisher Copyright:
© 2015 IEEE.

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

Fingerprint

Dive into the research topics of 'A scan segment skip technique for low power test'. Together they form a unique fingerprint.

Cite this