Abstract
In this paper, a new repair scheme which consists of a new repair algorithm and a base die structure of TSV based 3D memory is proposed. The traditional repair process in 3D memory uses extra cells in each memory layer. This paper proposes a new redundancy cell structure for repairing memory layers using spare cells on the base die which consists of solution memory, spare CAM and a control structure. The experimental results show that the repair rate of the new repair scheme is better than that of the inter-die method.
Original language | English |
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Title of host publication | Proceedings - International SoC Design Conference 2017, ISOCC 2017 |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 11-12 |
Number of pages | 2 |
ISBN (Electronic) | 9781538622858 |
DOIs | |
Publication status | Published - 2018 May 29 |
Event | 14th International SoC Design Conference, ISOCC 2017 - Seoul, Korea, Republic of Duration: 2017 Nov 5 → 2017 Nov 8 |
Publication series
Name | Proceedings - International SoC Design Conference 2017, ISOCC 2017 |
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Other
Other | 14th International SoC Design Conference, ISOCC 2017 |
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Country/Territory | Korea, Republic of |
City | Seoul |
Period | 17/11/5 → 17/11/8 |
Bibliographical note
Publisher Copyright:© 2017 IEEE.
All Science Journal Classification (ASJC) codes
- Hardware and Architecture
- Electrical and Electronic Engineering
- Electronic, Optical and Magnetic Materials