A new maximal diagnosis algorithm for interconnect test

Yongjoon Kim, Hyun Don Kim, Sungho Kang

Research output: Contribution to journalArticlepeer-review

15 Citations (Scopus)


Interconnect test for highly integrated environments becomes more important in terms of its test time and a complete diagnosis, as the complexity of the circuit increases. Since the board-level interconnect test is based on boundary scan technology, it takes a long test time to apply test vectors serially through a long scan chain. Complete diagnosis is another important issue. Since the board-level test is performed for repair, noticing the faulty position is an essential element of any interconnect test. Generally, the interconnect test algorithms that need a short test time cannot perform the complete diagnosis and the algorithms that perform the complete diagnosis need a lengthy test time. To overcome this problem, a new interconnect test algorithm is developed. The new algorithm can provide the complete diagnosis of all faults with a shorter test time compared to the previous algorithms.

Original languageEnglish
Pages (from-to)532-537
Number of pages6
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Issue number5
Publication statusPublished - 2004 May

All Science Journal Classification (ASJC) codes

  • Software
  • Hardware and Architecture
  • Electrical and Electronic Engineering


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