A Low-Voltage PLL with a Supply-Noise Compensated Feedforward Ring VCO

Sung Geun Kim, Jinsoo Rhim, Dae Hyun Kwon, Min Hyeong Kim, Woo Young Choi

Research output: Contribution to journalArticlepeer-review

25 Citations (Scopus)


A low-voltage phase-locked-loop (PLL) circuit with a supply-noise-compensated feedforward ring voltage-controlled oscillator (FRVCO) is demonstrated. The oscillation frequency fluctuation due to supply noise is compensated by adjusting the ratio of driving strength in feedforward and direct paths in FRVCO. A prototype 400-MHz PLL circuit operating at 0.65 V is fabricated with 180-nm standard CMOS process. Measurement results show that supply-noise compensation is successfully achieved. Our PLL consumes only 242.1 μW.

Original languageEnglish
Article number7410038
Pages (from-to)548-552
Number of pages5
JournalIEEE Transactions on Circuits and Systems II: Express Briefs
Issue number6
Publication statusPublished - 2016 Jun

Bibliographical note

Funding Information:
This work was supported by the National Research Foundation of Korea funded by the Ministry of Education, Science, and Technology of Korea under Grant 2015R1A2A2A01007772.

Publisher Copyright:
© 2016 IEEE.

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering


Dive into the research topics of 'A Low-Voltage PLL with a Supply-Noise Compensated Feedforward Ring VCO'. Together they form a unique fingerprint.

Cite this