A low-cost BIST based on histogram testing for analog to digital converters

Kicheol Kim; Youbean Kim; Incheol Kim; Hyeonuk Son; Sungho Kang

doi:10.1093/ietele/e91-c.4.670

A low-cost BIST based on histogram testing for analog to digital converters

Kicheol Kim, Youbean Kim, Incheol Kim, Hyeonuk Son, Sungho Kang

Department of Electrical and Electronic Engineering

Research output: Contribution to journal › Article › peer-review

1 Citation (Scopus)

Abstract

In this letter a histogram-based BIST (Built-In Self-Test) approach for deriving the main characteristic parameters of an ADC (Analog to Digital Converter) such as offset, gain and non-linearities is proposed. The BIST uses a ramp signal as an input signal and two counters as a response analyzer to calculate the derived static parameters. Experimental results show that the proposed method reduces the hardware overhead and testing time while detecting any static faults in an ADC.

Original language	English
Pages (from-to)	670-672
Number of pages	3
Journal	IEICE Transactions on Electronics
Volume	E91-C
Issue number	4
DOIs	https://doi.org/10.1093/ietele/e91-c.4.670
Publication status	Published - 2008 Apr

All Science Journal Classification (ASJC) codes

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

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10.1093/ietele/e91-c.4.670

Cite this

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AB - In this letter a histogram-based BIST (Built-In Self-Test) approach for deriving the main characteristic parameters of an ADC (Analog to Digital Converter) such as offset, gain and non-linearities is proposed. The BIST uses a ramp signal as an input signal and two counters as a response analyzer to calculate the derived static parameters. Experimental results show that the proposed method reduces the hardware overhead and testing time while detecting any static faults in an ADC.

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A low-cost BIST based on histogram testing for analog to digital converters

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