@inproceedings{ba5f1072f3a64a55bd11f87093374065,
title = "A low-complexity issue queue design with speculative pre-execution",
abstract = "Current superscalar architectures inherently depend on an instruction issue queue to achieve multiple instruction issue and out-of-order execution. However, the issue queue is implemented as a centralized structure and mainly causes globally broadcasting operations to wake up and select the instructions. Therefore, a large issue queue ultimately results in a low clock rate along with a high circuit complexity. This paper proposes Speculative Pre-Execution Assisted by compileR (SPEAR), a low-complexity issue queue design. SPEAR is designed to manage the small issue queue more efficiently without increasing the queue size. To this end, we have first recognized that the long memory latency is one of the factors which demand a large queue, and we aim at achieving early execution of the miss-causing load instructions using another hierarchy of an issue queue. We speculatively pre-execute those miss-causing instructions as an additional prefetching thread.",
author = "Ro, {Won W.} and Gaudiot, {Jean Luc}",
year = "2005",
doi = "10.1007/11602569_38",
language = "English",
isbn = "3540309365",
series = "Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)",
publisher = "Springer Verlag",
pages = "353--362",
booktitle = "High Performance Computing, HiPC 2005 - 12th International Conference, Proceedings",
address = "Germany",
note = "12th International Conference on High Performance Computing, HiPC 2005 ; Conference date: 18-12-2005 Through 21-12-2005",
}