A low-complexity issue queue design with speculative pre-execution

Won W. Ro, Jean Luc Gaudiot

Research output: Chapter in Book/Report/Conference proceedingConference contribution


Current superscalar architectures inherently depend on an instruction issue queue to achieve multiple instruction issue and out-of-order execution. However, the issue queue is implemented as a centralized structure and mainly causes globally broadcasting operations to wake up and select the instructions. Therefore, a large issue queue ultimately results in a low clock rate along with a high circuit complexity. This paper proposes Speculative Pre-Execution Assisted by compileR (SPEAR), a low-complexity issue queue design. SPEAR is designed to manage the small issue queue more efficiently without increasing the queue size. To this end, we have first recognized that the long memory latency is one of the factors which demand a large queue, and we aim at achieving early execution of the miss-causing load instructions using another hierarchy of an issue queue. We speculatively pre-execute those miss-causing instructions as an additional prefetching thread.

Original languageEnglish
Title of host publicationHigh Performance Computing, HiPC 2005 - 12th International Conference, Proceedings
PublisherSpringer Verlag
Number of pages10
ISBN (Print)3540309365, 9783540309369
Publication statusPublished - 2005
Event12th International Conference on High Performance Computing, HiPC 2005 - Goa, India
Duration: 2005 Dec 182005 Dec 21

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume3769 LNCS
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349


Other12th International Conference on High Performance Computing, HiPC 2005

All Science Journal Classification (ASJC) codes

  • Theoretical Computer Science
  • Computer Science(all)


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