A Fully Digital Time-Mode CMOS Image Sensor with 22.9pJ/frame.pixel and 92dB Dynamic Range

CMOS image sensor (CIS) technology used for video recording has dramatically evolved in recent years, enabling high-quality image acquisition. Always-on CISs for smart IoT devices should be extremely low-power and have wide dynamic range (WDR) to identify objects at any time, even under harsh illumination. A typical voltage-mode CIS reads out a voltage from the pixel array, converts it to a digital value, and then transfers the data to a frame memory. Since the maximum voltage signal is bounded by the supply voltage, various low-noise CIS techniques have been reported to improve dynamic range (DR) [1], [2]. However, AD conversion and data transfer consume about 90% of total power despite advanced circuit and process technologies [2]. To get around the DR bound due to the supply voltage, several time-mode CISs have been reported, achieving both low power consumption and WDR [3], [4]. For time-mode operation, the in-pixel comparator on a selected row monitors whether the PD voltage has reached a threshold. The elapsed time is digitized by a column-parallel time-to-digital converter. Once the monitoring and conversion for the selected row are completed, the data is transferred to a frame memory, and then the process moves on to the next row. This row-by-row progressive conversion still requires a time-to-digital conversion circuit and a high-speed interface circuit, consuming most of the power. This paper proposes a fully digital time-mode CIS, which introduces a token readout and repeated-scanning scheme for digitization. The scheme removes the time-to-digital converter and the high-speed interface, allowing significant power reduction. All the circuits in the CIS operate dynamically, lowering the power consumption even further.