TY - GEN
T1 - A digital 120Mb/s MIMO-OFDM baseband processor for high speed wireless LANs
AU - Jung, Yunho
AU - Kim, Jiho
AU - Noh, Seungpyo
AU - Yoon, Hongil
AU - Kim, Jaeseok
PY - 2005
Y1 - 2005
N2 - In this paper, we present the implementation results of a digital 120Mb/s MIMO-OFDM wireless LAN (WLAN) base-band processor based on the proposed decoding algorithms. The processor has two MIMO-OFDM modes, space-frequency block coded OFDM (SFBC-OFDM) and space division multiplexed OFDM (SDM-OFDM). From those, it achieves a considerable performance gain as well as supports double data rates compared to the conventional IEEE 802.11a WLANs. In the results of performance evaluation, the processor requires a SNR of 1.8-27 dB for transmission modes at 10 % packet error rate (PER), and the chip is implemented with 4.8M transistors in 3.9×3.9 mm2 using 0.18μm CMOS process.
AB - In this paper, we present the implementation results of a digital 120Mb/s MIMO-OFDM wireless LAN (WLAN) base-band processor based on the proposed decoding algorithms. The processor has two MIMO-OFDM modes, space-frequency block coded OFDM (SFBC-OFDM) and space division multiplexed OFDM (SDM-OFDM). From those, it achieves a considerable performance gain as well as supports double data rates compared to the conventional IEEE 802.11a WLANs. In the results of performance evaluation, the processor requires a SNR of 1.8-27 dB for transmission modes at 10 % packet error rate (PER), and the chip is implemented with 4.8M transistors in 3.9×3.9 mm2 using 0.18μm CMOS process.
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U2 - 10.1109/CICC.2005.1568613
DO - 10.1109/CICC.2005.1568613
M3 - Conference contribution
AN - SCOPUS:33847140656
SN - 0780390237
SN - 9780780390232
T3 - Proceedings of the Custom Integrated Circuits Conference
SP - 81
EP - 84
BT - Proceedings of the IEEE 2005 Custom Integrated Circuits Conference
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - IEEE 2005 Custom Integrated Circuits Conference
Y2 - 18 September 2005 through 21 September 2005
ER -