A continuous-time ΣΔ modulator with a Gm-C input stage, 120-dB CMRR and -87 dB THD

Navid Sarhangnejad; Rong Wu; Youngcheol Chae; Kofi A.A. Makinwa

doi:10.1109/ASSCC.2011.6123556

A continuous-time ΣΔ modulator with a Gm-C input stage, 120-dB CMRR and -87 dB THD

Navid Sarhangnejad, Rong Wu, Youngcheol Chae, Kofi A.A. Makinwa

Department of Electrical and Electronic Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

16 Citations (Scopus)

Abstract

This paper describes a precision continuous-time ΣΔ modulator for sensor applications. To achieve high input impedance, it uses a G _m-C integrator as its input stage. The non-linearity of this stage is cancelled by a replica transconductor in the modulator's feedback path, which is driven by a low-pass filtered version of the modulator's single-bit output. Since the filter adds extra delay, this path is bypassed at high frequencies to preserve modulator stability. The modulator was implemented in a 0.7-μm CMOS process and achieves 79-dB SNR/SNDR and 82-dB DR over a 100-Hz signal bandwidth. It also achieves 32-μV offset, 120-dB CMRR, 120-dB PSRR, and -87 dB THD.

Original language	English
Title of host publication	2011 Proceedings of Technical Papers
Subtitle of host publication	IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011
Pages	245-248
Number of pages	4
DOIs	https://doi.org/10.1109/ASSCC.2011.6123556
Publication status	Published - 2011
Event	7th IEEE Asian Solid-State Circuits Conference, A-SSCC 2011 - Jeju, Korea, Republic of Duration: 2011 Nov 14 → 2011 Nov 16

Publication series

Name	2011 Proceedings of Technical Papers: IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011

Other

Other	7th IEEE Asian Solid-State Circuits Conference, A-SSCC 2011
Country/Territory	Korea, Republic of
City	Jeju
Period	11/11/14 → 11/11/16

All Science Journal Classification (ASJC) codes

Hardware and Architecture
Electrical and Electronic Engineering

Access to Document

10.1109/ASSCC.2011.6123556

Cite this

Sarhangnejad, N., Wu, R., Chae, Y., & Makinwa, K. A. A. (2011). A continuous-time ΣΔ modulator with a Gm-C input stage, 120-dB CMRR and -87 dB THD. In 2011 Proceedings of Technical Papers: IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011 (pp. 245-248). [6123556] (2011 Proceedings of Technical Papers: IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011). https://doi.org/10.1109/ASSCC.2011.6123556

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title = "A continuous-time ΣΔ modulator with a Gm-C input stage, 120-dB CMRR and -87 dB THD",

abstract = "This paper describes a precision continuous-time ΣΔ modulator for sensor applications. To achieve high input impedance, it uses a G m-C integrator as its input stage. The non-linearity of this stage is cancelled by a replica transconductor in the modulator's feedback path, which is driven by a low-pass filtered version of the modulator's single-bit output. Since the filter adds extra delay, this path is bypassed at high frequencies to preserve modulator stability. The modulator was implemented in a 0.7-μm CMOS process and achieves 79-dB SNR/SNDR and 82-dB DR over a 100-Hz signal bandwidth. It also achieves 32-μV offset, 120-dB CMRR, 120-dB PSRR, and -87 dB THD.",

author = "Navid Sarhangnejad and Rong Wu and Youngcheol Chae and Makinwa, {Kofi A.A.}",

year = "2011",

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series = "2011 Proceedings of Technical Papers: IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011",

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note = "7th IEEE Asian Solid-State Circuits Conference, A-SSCC 2011 ; Conference date: 14-11-2011 Through 16-11-2011",

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Sarhangnejad, N, Wu, R, Chae, Y & Makinwa, KAA 2011, A continuous-time ΣΔ modulator with a Gm-C input stage, 120-dB CMRR and -87 dB THD. in 2011 Proceedings of Technical Papers: IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011., 6123556, 2011 Proceedings of Technical Papers: IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011, pp. 245-248, 7th IEEE Asian Solid-State Circuits Conference, A-SSCC 2011, Jeju, Korea, Republic of, 11/11/14. https://doi.org/10.1109/ASSCC.2011.6123556

A continuous-time ΣΔ modulator with a Gm-C input stage, 120-dB CMRR and -87 dB THD. / Sarhangnejad, Navid; Wu, Rong; Chae, Youngcheol et al.
2011 Proceedings of Technical Papers: IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011. 2011. p. 245-248 6123556 (2011 Proceedings of Technical Papers: IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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AU - Makinwa, Kofi A.A.

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N2 - This paper describes a precision continuous-time ΣΔ modulator for sensor applications. To achieve high input impedance, it uses a G m-C integrator as its input stage. The non-linearity of this stage is cancelled by a replica transconductor in the modulator's feedback path, which is driven by a low-pass filtered version of the modulator's single-bit output. Since the filter adds extra delay, this path is bypassed at high frequencies to preserve modulator stability. The modulator was implemented in a 0.7-μm CMOS process and achieves 79-dB SNR/SNDR and 82-dB DR over a 100-Hz signal bandwidth. It also achieves 32-μV offset, 120-dB CMRR, 120-dB PSRR, and -87 dB THD.

AB - This paper describes a precision continuous-time ΣΔ modulator for sensor applications. To achieve high input impedance, it uses a G m-C integrator as its input stage. The non-linearity of this stage is cancelled by a replica transconductor in the modulator's feedback path, which is driven by a low-pass filtered version of the modulator's single-bit output. Since the filter adds extra delay, this path is bypassed at high frequencies to preserve modulator stability. The modulator was implemented in a 0.7-μm CMOS process and achieves 79-dB SNR/SNDR and 82-dB DR over a 100-Hz signal bandwidth. It also achieves 32-μV offset, 120-dB CMRR, 120-dB PSRR, and -87 dB THD.

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Sarhangnejad N, Wu R, Chae Y, Makinwa KAA. A continuous-time ΣΔ modulator with a Gm-C input stage, 120-dB CMRR and -87 dB THD. In 2011 Proceedings of Technical Papers: IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011. 2011. p. 245-248. 6123556. (2011 Proceedings of Technical Papers: IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011). doi: 10.1109/ASSCC.2011.6123556

A continuous-time ΣΔ modulator with a Gm-C input stage, 120-dB CMRR and -87 dB THD

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