A CMOS Four Quadrant Current/Transconductance Multiplier

Alejandro Diaz-Sanchez; Jaime Ramírez-Angulo; Edgar Sánchez-Sinencio; Gunhee Han

doi:10.1023/A:1008310017048

A CMOS Four Quadrant Current/Transconductance Multiplier

Alejandro Diaz-Sanchez, Jaime Ramírez-Angulo, Edgar Sánchez-Sinencio, Gunhee Han

School of Integrated Technology

Research output: Contribution to journal › Article › peer-review

8 Citations (Scopus)

Abstract

This paper describes a highly linear current four quadrant multiplier. The circuit is designed to operate in a fully differential way. It is based on the square-law characteristic of MOS transistors in saturation region. Experimental results for 2 μm CMOS technology are provided.

Original language	English
Pages (from-to)	163-168
Number of pages	6
Journal	Analog Integrated Circuits and Signal Processing
Volume	19
Issue number	2
DOIs	https://doi.org/10.1023/A:1008310017048
Publication status	Published - 1999

All Science Journal Classification (ASJC) codes

Signal Processing
Hardware and Architecture
Surfaces, Coatings and Films

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title = "A CMOS Four Quadrant Current/Transconductance Multiplier",

abstract = "This paper describes a highly linear current four quadrant multiplier. The circuit is designed to operate in a fully differential way. It is based on the square-law characteristic of MOS transistors in saturation region. Experimental results for 2 μm CMOS technology are provided.",

author = "Alejandro Diaz-Sanchez and Jaime Ram{\'i}rez-Angulo and Edgar S{\'a}nchez-Sinencio and Gunhee Han",

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AU - Diaz-Sanchez, Alejandro

AU - Ramírez-Angulo, Jaime

AU - Sánchez-Sinencio, Edgar

AU - Han, Gunhee

PY - 1999

Y1 - 1999

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A CMOS Four Quadrant Current/Transconductance Multiplier

Abstract

All Science Journal Classification (ASJC) codes

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