Abstract
This article presents a 640 \times 640 fully dynamic CMOS image sensor for the always-on operation. It consists of a dynamic pixel source follower (SF), whose output signal is sampled into a parasitic column capacitor and then read out by a dynamic single-slope (SS) analog-To-digital converter (ADC) based on a dynamic bias comparator and an energy-efficient two-step counter. The prototype sensor was implemented in a 110-nm CMOS process, achieving 0.3% peak non-linearity, 6.1 e-rms random noise (RN), and 67-dB dynamic range. The power consumption is only 2.1 mW at 44 frames per second (fps) and is further reduced to 140 \mu \text{W} at 5 fps with the sub-sampled 320 \times 320 mode. This sensor achieves a state-of-The-Art energy efficiency figure-of-merit of 0.71 e- \cdot nJ.
| Original language | English |
|---|---|
| Article number | 8944068 |
| Pages (from-to) | 898-907 |
| Number of pages | 10 |
| Journal | IEEE Journal of Solid-State Circuits |
| Volume | 55 |
| Issue number | 4 |
| DOIs | |
| Publication status | Published - 2020 Apr |
Bibliographical note
Funding Information:Manuscript received August 22, 2019; revised November 8, 2019; accepted December 1, 2019. Date of publication December 27, 2019; date of current version March 26, 2020. This article was approved by Guest Editor Ken Takeuchi. This work was supported by Intromedic Company, Ltd. (Corresponding author: Youngcheol Chae.) I. Park, W. Jo, C. Park, B. Park, and Y. Chae are with the Department of Electrical and Electronic Engineering, Yonsei University, Seoul 120-749, South Korea (e-mail: ychae@yonsei.ac.kr).
Publisher Copyright:
© 1966-2012 IEEE.
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering
