TY - GEN
T1 - A 622Mb/s BPSK demodulator with mixed-mode demodulation scheme
AU - Kim, Duho
AU - Seo, Young Kwang
AU - Kim, Hyunchin
AU - Choi, Woo Young
PY - 2007
Y1 - 2007
N2 - A new mixed-mode binary phase shift keying (BPSK) demodulator is demonstrated using a half-rate bangbang phase detector commonly used in clock and data recovery (CDR) applications. This demodulator can be used for new home networking applications based on cable TV lines. A prototype chip is realized that can demodulate up to 622Mb/s data at 1.4GHz carrier frequency.
AB - A new mixed-mode binary phase shift keying (BPSK) demodulator is demonstrated using a half-rate bangbang phase detector commonly used in clock and data recovery (CDR) applications. This demodulator can be used for new home networking applications based on cable TV lines. A prototype chip is realized that can demodulate up to 622Mb/s data at 1.4GHz carrier frequency.
UR - http://www.scopus.com/inward/record.url?scp=51349167713&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=51349167713&partnerID=8YFLogxK
U2 - 10.1109/ASSCC.2007.4425687
DO - 10.1109/ASSCC.2007.4425687
M3 - Conference contribution
AN - SCOPUS:51349167713
SN - 1424413605
SN - 9781424413607
T3 - 2007 IEEE Asian Solid-State Circuits Conference, A-SSCC
SP - 288
EP - 291
BT - 2007 IEEE Asian Solid-State Circuits Conference, A-SSCC
T2 - 2007 IEEE Asian Solid-State Circuits Conference, A-SSCC
Y2 - 12 November 2007 through 14 November 2007
ER -