A 4.8-Gb/s mixed-mode CMOS QPSK demodulator for 60-GHz wireless personal area networks

Duho Kim; Minsu Ko; Kwang Chun Choi; Woo Young Choi

doi:10.1109/APCCAS.2010.5774815

A 4.8-Gb/s mixed-mode CMOS QPSK demodulator for 60-GHz wireless personal area networks

Duho Kim, Minsu Ko, Kwang Chun Choi, Woo Young Choi

Department of Electrical and Electronic Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

2 Citations (Scopus)

Abstract

A mixed-mode QPSK demodulator for 60-GHz wireless personal area network application is demonstrated. The prototype chip realized by 60-nm CMOS process can demodulate up to 4.8-Gb/s QPSK signals at 4.8-GHz carrier frequency. At this carrier frequency, the demodulator core consumes 54 mW from 1.2-V power supply while the chip area is 150 × 150 μm². Using the fabricated chip, transmission and demodulation of 1.7-GSymbol/s QPSK signal in 60-GHz link is demonstrated.

Original language	English
Title of host publication	Proceedings of the 2010 Asia Pacific Conference on Circuit and System, APCCAS 2010
Pages	60-63
Number of pages	4
DOIs	https://doi.org/10.1109/APCCAS.2010.5774815
Publication status	Published - 2010
Event	2010 Asia Pacific Conference on Circuit and System, APCCAS 2010 - Kuala Lumpur, Malaysia Duration: 2010 Dec 6 → 2010 Dec 9

Publication series

Name	IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS

Other

Other	2010 Asia Pacific Conference on Circuit and System, APCCAS 2010
Country/Territory	Malaysia
City	Kuala Lumpur
Period	10/12/6 → 10/12/9

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering

Access to Document

10.1109/APCCAS.2010.5774815

Cite this

Kim, D., Ko, M., Choi, K. C., & Choi, W. Y. (2010). A 4.8-Gb/s mixed-mode CMOS QPSK demodulator for 60-GHz wireless personal area networks. In Proceedings of the 2010 Asia Pacific Conference on Circuit and System, APCCAS 2010 (pp. 60-63). Article 5774815 (IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS). https://doi.org/10.1109/APCCAS.2010.5774815

@inproceedings{6f29d55454e94789ac6dcfd42b671ee3,

title = "A 4.8-Gb/s mixed-mode CMOS QPSK demodulator for 60-GHz wireless personal area networks",

abstract = "A mixed-mode QPSK demodulator for 60-GHz wireless personal area network application is demonstrated. The prototype chip realized by 60-nm CMOS process can demodulate up to 4.8-Gb/s QPSK signals at 4.8-GHz carrier frequency. At this carrier frequency, the demodulator core consumes 54 mW from 1.2-V power supply while the chip area is 150 × 150 μm2. Using the fabricated chip, transmission and demodulation of 1.7-GSymbol/s QPSK signal in 60-GHz link is demonstrated.",

author = "Duho Kim and Minsu Ko and Choi, {Kwang Chun} and Choi, {Woo Young}",

year = "2010",

doi = "10.1109/APCCAS.2010.5774815",

language = "English",

isbn = "9781424474561",

series = "IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS",

pages = "60--63",

booktitle = "Proceedings of the 2010 Asia Pacific Conference on Circuit and System, APCCAS 2010",

note = "2010 Asia Pacific Conference on Circuit and System, APCCAS 2010 ; Conference date: 06-12-2010 Through 09-12-2010",

}

Kim, D, Ko, M, Choi, KC & Choi, WY 2010, A 4.8-Gb/s mixed-mode CMOS QPSK demodulator for 60-GHz wireless personal area networks. in Proceedings of the 2010 Asia Pacific Conference on Circuit and System, APCCAS 2010., 5774815, IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS, pp. 60-63, 2010 Asia Pacific Conference on Circuit and System, APCCAS 2010, Kuala Lumpur, Malaysia, 10/12/6. https://doi.org/10.1109/APCCAS.2010.5774815

A 4.8-Gb/s mixed-mode CMOS QPSK demodulator for 60-GHz wireless personal area networks. / Kim, Duho; Ko, Minsu; Choi, Kwang Chun et al.
Proceedings of the 2010 Asia Pacific Conference on Circuit and System, APCCAS 2010. 2010. p. 60-63 5774815 (IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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N2 - A mixed-mode QPSK demodulator for 60-GHz wireless personal area network application is demonstrated. The prototype chip realized by 60-nm CMOS process can demodulate up to 4.8-Gb/s QPSK signals at 4.8-GHz carrier frequency. At this carrier frequency, the demodulator core consumes 54 mW from 1.2-V power supply while the chip area is 150 × 150 μm2. Using the fabricated chip, transmission and demodulation of 1.7-GSymbol/s QPSK signal in 60-GHz link is demonstrated.

AB - A mixed-mode QPSK demodulator for 60-GHz wireless personal area network application is demonstrated. The prototype chip realized by 60-nm CMOS process can demodulate up to 4.8-Gb/s QPSK signals at 4.8-GHz carrier frequency. At this carrier frequency, the demodulator core consumes 54 mW from 1.2-V power supply while the chip area is 150 × 150 μm2. Using the fabricated chip, transmission and demodulation of 1.7-GSymbol/s QPSK signal in 60-GHz link is demonstrated.

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A 4.8-Gb/s mixed-mode CMOS QPSK demodulator for 60-GHz wireless personal area networks

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