A 300-μW Audio Δσ Modulator with 100.5-dB DR Using Dynamic Bias Inverter

Sangwoo Lee, Woojin Jo, Seungwoo Song, Youngcheol Chae

Research output: Contribution to journalArticlepeer-review

27 Citations (Scopus)


This paper presents a micropower audio delta-sigma (ΔΣ) modulator for mobile applications. This work employs power-efficient integrators based on the dynamic bias inverter, which consists of a cascode inverter, a floating current source and two offset-storage capacitors. The quiescent current of the inverter is copied from the floating current via offset-storage capacitors and the speed limitation caused by the cascode transistors in the inverter is resolved by using active parasitic compensation. This maximizes both gm/ID ratio and slew rate of the inverter-based integrator, while compensating process, voltage, and temperature (PVT) variations. To verify the effectiveness of the proposed technique, a single-bit third-order ΔΣ modulator is implemented in a 0.18 μm CMOS technology. The prototype modulator achieves 97.7 dB SNDR, 98.6 dB SNR, and 100.5 dB DR in a 20-kHz signal bandwidth, while consuming only 300-μW from a 1.8 V supply. This corresponds to a state-of-the-art Schreier's FoM of 178.7 dB. The results are fully verified under variable supplies and temperatures.

Original languageEnglish
Pages (from-to)1866-1875
Number of pages10
JournalIEEE Transactions on Circuits and Systems I: Regular Papers
Issue number11
Publication statusPublished - 2016 Nov

Bibliographical note

Funding Information:
This work was supported by SK Telecom and Mid-career Researcher Program through NRF grant funded by the MEST (2014R1A2A2A09053061).

Publisher Copyright:
© 2017 IEEE.

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering


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