A 14-nm Low Voltage SRAM with Charge-Recycling and Charge Self-Saving Techniques for Low-Power Applications

Keonhee Cho; Giseok Kim; Jisang Oh; Kiryong Kim; Changsu Sim; Younmee Bae; Mijung Kim; Sangyeop Baeck; Taejoong Song; Seong Ook Jung

doi:10.1109/VLSITechnologyandCir46769.2022.9830353

A 14-nm Low Voltage SRAM with Charge-Recycling and Charge Self-Saving Techniques for Low-Power Applications

Keonhee Cho, Giseok Kim, Jisang Oh, Kiryong Kim, Changsu Sim, Younmee Bae, Mijung Kim, Sangyeop Baeck, Taejoong Song, Seong Ook Jung

Department of Electrical and Electronic Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

3 Citations (Scopus)

Abstract

This paper presents charge-recycling and charge self-saving techniques in SRAM that lower VMIN while consuming minimal read and write energies. The proposed techniques (with flying CVSS) achieve 250mV (270mV) VMIN improvements in 64-Kb SRAM using 0.080m2 LV SRAM cell on 14-nm FinFET technology.

Original language	English
Title of host publication	2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	214-215
Number of pages	2
ISBN (Electronic)	9781665497725
DOIs	https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830353
Publication status	Published - 2022
Event	2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022 - Honolulu, United States Duration: 2022 Jun 12 → 2022 Jun 17

Publication series

Name	Digest of Technical Papers - Symposium on VLSI Technology
Volume	2022-June
ISSN (Print)	0743-1562

Conference

Conference	2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022
Country/Territory	United States
City	Honolulu
Period	22/6/12 → 22/6/17

Bibliographical note

Publisher Copyright:
© 2022 IEEE.

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering

Access to Document

10.1109/VLSITechnologyandCir46769.2022.9830353

Cite this

Cho, K., Kim, G., Oh, J., Kim, K., Sim, C., Bae, Y., Kim, M., Baeck, S., Song, T., & Jung, S. O. (2022). A 14-nm Low Voltage SRAM with Charge-Recycling and Charge Self-Saving Techniques for Low-Power Applications. In 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022 (pp. 214-215). (Digest of Technical Papers - Symposium on VLSI Technology; Vol. 2022-June). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830353

Cho, Keonhee ; Kim, Giseok ; Oh, Jisang et al. / A 14-nm Low Voltage SRAM with Charge-Recycling and Charge Self-Saving Techniques for Low-Power Applications. 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022. Institute of Electrical and Electronics Engineers Inc., 2022. pp. 214-215 (Digest of Technical Papers - Symposium on VLSI Technology).

@inproceedings{a9729f26581d41959ed39589a9d880bb,

title = "A 14-nm Low Voltage SRAM with Charge-Recycling and Charge Self-Saving Techniques for Low-Power Applications",

abstract = "This paper presents charge-recycling and charge self-saving techniques in SRAM that lower VMIN while consuming minimal read and write energies. The proposed techniques (with flying CVSS) achieve 250mV (270mV) VMIN improvements in 64-Kb SRAM using 0.080m2 LV SRAM cell on 14-nm FinFET technology.",

author = "Keonhee Cho and Giseok Kim and Jisang Oh and Kiryong Kim and Changsu Sim and Younmee Bae and Mijung Kim and Sangyeop Baeck and Taejoong Song and Jung, {Seong Ook}",

note = "Publisher Copyright: {\textcopyright} 2022 IEEE.; 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022 ; Conference date: 12-06-2022 Through 17-06-2022",

year = "2022",

doi = "10.1109/VLSITechnologyandCir46769.2022.9830353",

language = "English",

series = "Digest of Technical Papers - Symposium on VLSI Technology",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "214--215",

booktitle = "2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022",

address = "United States",

}

Cho, K, Kim, G, Oh, J, Kim, K, Sim, C, Bae, Y, Kim, M, Baeck, S, Song, T & Jung, SO 2022, A 14-nm Low Voltage SRAM with Charge-Recycling and Charge Self-Saving Techniques for Low-Power Applications. in 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022. Digest of Technical Papers - Symposium on VLSI Technology, vol. 2022-June, Institute of Electrical and Electronics Engineers Inc., pp. 214-215, 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022, Honolulu, United States, 22/6/12. https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830353

A 14-nm Low Voltage SRAM with Charge-Recycling and Charge Self-Saving Techniques for Low-Power Applications. / Cho, Keonhee; Kim, Giseok; Oh, Jisang et al.
2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022. Institute of Electrical and Electronics Engineers Inc., 2022. p. 214-215 (Digest of Technical Papers - Symposium on VLSI Technology; Vol. 2022-June).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

TY - GEN

T1 - A 14-nm Low Voltage SRAM with Charge-Recycling and Charge Self-Saving Techniques for Low-Power Applications

AU - Cho, Keonhee

AU - Kim, Giseok

AU - Oh, Jisang

AU - Kim, Kiryong

AU - Sim, Changsu

AU - Bae, Younmee

AU - Kim, Mijung

AU - Baeck, Sangyeop

AU - Song, Taejoong

AU - Jung, Seong Ook

PY - 2022

Y1 - 2022

N2 - This paper presents charge-recycling and charge self-saving techniques in SRAM that lower VMIN while consuming minimal read and write energies. The proposed techniques (with flying CVSS) achieve 250mV (270mV) VMIN improvements in 64-Kb SRAM using 0.080m2 LV SRAM cell on 14-nm FinFET technology.

AB - This paper presents charge-recycling and charge self-saving techniques in SRAM that lower VMIN while consuming minimal read and write energies. The proposed techniques (with flying CVSS) achieve 250mV (270mV) VMIN improvements in 64-Kb SRAM using 0.080m2 LV SRAM cell on 14-nm FinFET technology.

UR - http://www.scopus.com/inward/record.url?scp=85135228734&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85135228734&partnerID=8YFLogxK

U2 - 10.1109/VLSITechnologyandCir46769.2022.9830353

DO - 10.1109/VLSITechnologyandCir46769.2022.9830353

M3 - Conference contribution

AN - SCOPUS:85135228734

T3 - Digest of Technical Papers - Symposium on VLSI Technology

SP - 214

EP - 215

BT - 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022

Y2 - 12 June 2022 through 17 June 2022

ER -

Cho K, Kim G, Oh J, Kim K, Sim C, Bae Y et al. A 14-nm Low Voltage SRAM with Charge-Recycling and Charge Self-Saving Techniques for Low-Power Applications. In 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022. Institute of Electrical and Electronics Engineers Inc. 2022. p. 214-215. (Digest of Technical Papers - Symposium on VLSI Technology). doi: 10.1109/VLSITechnologyandCir46769.2022.9830353

A 14-nm Low Voltage SRAM with Charge-Recycling and Charge Self-Saving Techniques for Low-Power Applications

Abstract

Publication series

Conference

Bibliographical note

All Science Journal Classification (ASJC) codes

Access to Document

Other files and links

Fingerprint

Cite this